Wei Song's web space

Institute of Information Engineering
C3 YiYuan, 80 XingShiKou Road
Haidian District
Beijing 100195
P.R. China
Email: wsong83@gmail.com


Welcome to my personal website!

I am Wei Song, an Associate Professor at the State Key Laboratory of Information Security, the Institute of Information Engineering, CAS. I was awarded PhD in computer science in 2011 from the School of Computer Science at the University of Manchester. Between 2011 and 2017, I was a Research Associate working for the University of Manchester and the University of Cambridge, where I researched the EDA for asynchronous circuits and the design of multicore processors. I was a core member of the lowRISC open SoC project and led the first four SoC releases. My current research interests include compiler optimization for processor and OS security, secure computer architecture, secure cache hierarchy, design of RISC-V processors, etc.

Some of my highlights in research and life:

  • Verified that the timing assumption on attacks described in the randomized CEASER cache is wrong.
  • Designed a high-speed cache simulation model supporting cache coherence.
  • Co-founder of the grass-rooted RISC-V group in China: CNRV.
  • Led the the hardware design of the first four releases of lowRISC SoC.
  • Designed the fastest FPGA merge sorter in the world at 2016.
  • Became a Research Associate at the University of Cambridge.
  • Jointly designed the first QDI NoC tolerant to permanent faults.
  • Designed the first SDM QDI NoC.
  • Full PhD scholarship from the UK EPSRC.

I normally accept one PhD student and one Master student every year. If you are interested in my research, please contact me through emails beforehand.

欢迎来到我的个人主页 ;-)



  • 证明了随机化缓存防御方案CEASER关于攻击的时间分析是错误的。
  • 实现了一个高速的一致性缓存仿真模型。
  • 合作建立了中国RISC-V草根小组CNRV。
  • 主持开发了lowRISC开源SoC的前4版实现。
  • 实现了2016年最快的FPGA归并排序器。
  • 到剑桥大学计算机实验室当博士后副研究员。
  • 合作完成了第一个能抵御永久性错误的QDI片上异步网络。
  • 完成了第一个空分复用的QDI异步片上网络。
  • 获得英国EPSRC全奖到曼彻斯特大学计算机学院读博士。